In the manufacture of semiconductor devices, it is typical that various kinds of heat treatments, such as film forming, pattern etching, oxidation/diffusion, reforming and annealing, are repeatedly performed to a semiconductor wafer to thereby manufacture desired devices. However, as the semiconductor devices become highly dense, multilayered and highly integrated, heat treatment methods grow more and more stringent year by year. In particular, there is a need to enhance wafer in-plane uniformity and improve a film quality therein during these heat treatments. In this regard, description will be given by taking as an example the treatment of channel layers or the like of a transistor, which is one of semiconductor devices. After ion-implanting impurity atoms into the channel layers or the like, annealing is usually carried out to stabilize the atomic structure thereof.
With reference to FIG. 13, a channel layer of a gate structure will be described as a representative example of a typical transistor structure. In FIG. 13, a source 2 and a drain 4, i.e., p+ concentration regions, formed by doping p-type impurities are respectively configured on the surface of a semiconductor wafer W, e.g., an n-type silicon substrate formed by doping n-type impurities. Further, on the surfaces of the source 2 and the drain 4, there are formed p++ regions 6 and 8 whose impurity concentration is greater than that of the p+ regions. A gate electrode 12 made of, e.g., a polysilicon layer, is formed between the source 2 and the drain 4 through a gate insulating film 10 such as a silicon oxide film or the like.
Insulating layers 14 made of, e.g., SiN, are formed on the sidewalls of the gate electrode 12 and the gate insulating film 10. Such micro-transistor configured as described above is formed on a wafer surface in multiple numbers and other essential micro-elements are also configured on the wafer surface in multiple numbers. This transistor structure is merely an example and various kinds of films for different purposes are available depending on the intended uses. Further, annealing is performed as noted above, in order to stabilize the atomic structure of the regions in which impurities are doped.
In this case, if the annealing is performed for a prolonged period of time, the atomic structure becomes stable but impurity atoms are diffused deep into the film in a thickness direction thereof, eventually going downwards through the film. Accordingly, there is a need to perform the annealing as short as possible. That is to say, in order to stabilize the atomic structure while maintaining the thickness of the channel layer or the like thin and preventing the impurity atoms from going through the film, it is necessary to rapidly heat up the semiconductor wafer to an annealing temperature and, after annealing, to speedily cool down the wafer to a temperature that no diffusion occurs.
In order to accomplish such annealing, lamp annealing using a heating lamp has been generally employed in a conventional treatment apparatus (see, Patent Reference 1). For example, a halogen lamp or a flash lamp may be used as the heating lamp.
Another conventional treatment apparatus is disclosed in, e.g., Patent Reference 2, in which apparatus a Peltier element is provided on a wafer stage and is used to raise or lower a wafer temperature when etching a wafer at a temperature of 100 to 250° C.
Recently, an LED element or a laser developed to have a relatively high output power is used as a heat source or a light source (see, Patent References 3 to 5). The LED element or the laser generates far less heat in itself than does a heating lamp and has a significantly longer life and a lower heat capacity than those of the heating lamp. Therefore, the LED element or the laser is more likely used.
As an example, Patent Reference 3 discloses a lamp fabricated by combining a heat pipe and an LED element. Patent Reference 4 shows that resist is heated by an LED element or a laser. Patent Reference 5 teaches the use of an LED element array for CVD process.
[Patent Reference 1]
U.S. Pat. No. 5,689,614
[Patent Reference 2]
Japanese Laid-open Patent Application No. 2001-85408
[Patent Reference 3]
Japanese Laid-open Patent Application No. 2004-296245
[Patent Reference 4]
Japanese Laid-open Patent Application No. 2004-134674
[Patent Reference 5]
U.S. Pat. No. 6,818,864
As described above, when a heat treatment is performed, it is necessary not only to heat a wafer so that a temperature distribution on a wafer surface becomes uniform but also to raise and lower a wafer temperature within a short period of time.
Moreover, in order to meet the demands for high speed and ultrafine semiconductor devices, it is required that impurities be implanted shallowly into impurity implanted regions, such as the source 2 and the drain 4, at an increased concentration. When annealing the impurity implanted regions, therefore, it is required to perform temperature elevation and temperature reduction at an increased rate so that diffusion of the impurities in a substrate thickness direction can be suppressed as much as possible.
In case of an annealing treatment using a halogen lamp as a heating source, the halogen lamp emits long-wavelength heating light having a central wavelength of, e.g., 1 to 3 μm, and a broad wavelength band of 3 to 5 μm. This poses a problem in that, despite an intention to heat only a shallow portion under a wafer surface, the heating light reaches a deep position of the wafer and heats up a deep portion thereof, consequently allowing impurities to be diffused into the deep portion under the wafer surface.
Furthermore, since the light emitted from the halogen lamp has the long wavelength as noted above and unnecessarily heats up the deep portion under the wafer surface, heating efficiency is reduced and thus it is necessary to use high output power, thereby causing reduction in energy efficiency.
In case of an annealing treatment using a flash lamp as a heating source, the flash lamp projects light having a wavelength quite shorter than that of the halogen lamp. However, as can be seen from a wavelength band of the flash lamp shown in FIG. 14, the light of the flash lamp has a central wavelength of about 500 nm and a comparatively broad wavelength band of about 1 μm. Therefore, just like the halogen lamp set forth above, there is a problem in that the flash lamp heats up a deep portion of a wafer.
Applying a laser or an LED (Light Emitting Diode) element as a heating source makes it possible to avoid the above-noted problems and to heat, e.g., only a surface portion of a wafer in an efficient manner. However, in case of an ArF laser (an excimer laser having a central wavelength of 193 nm) and a KrF laser (an excimer laser having a central wavelength of 248 nm), both of which are representative lasers, the light irradiated from these lasers has a wavelength band width less than 1 μm which is too narrow, contrary to the foregoing cases. As a consequence, there is a problem in that a temperature difference which may cause lateral stresses in minute regions is generated or a wafer is locally melted, depending on the kinds of films or the wavelength of the light. Furthermore, since the cross-sectional area through which laser light passes is small, the laser light needs to be scanned by means of a scanning mechanism in order to heat the entire wafer surface. This entails a problem in that the structure thereof becomes complicated.
In case of the LED element, the wavelength of the emitted light has a band width of about 100 nm within a range from, e.g., 300 to 950 nm, although the band width depends on the kinds of LED elements employed. This means that the band width of the light emitted from the LED is wider than that of the laser but narrower than that of the flash lamp or the halogen lamp. Therefore, the LED element can reduce film-quality-dependent selectivity of a heating temperature and, consequently, has a feature of rather uniformly heating the surface portion of a wafer.
However, the mere use of the LED element does not guarantee optimization of the wavelength of the emitted light and, therefore, it is difficult to selectively and uniformly heat only the surface portion of a wafer in such a way that the depth of impurity diffusion regions is kept small and the concentration of impurities is kept high enough to meet the recent design rule requirement.